Technology Integration

Hyogi Sim

Hyogi Sim is an HPC systems engineer in the Technology Integration Group. His primarily role is to design and develop UnifyCR, a checkpoint-restart storage system for the exascale computing project. Hyogi first joined Technology Integration Group in 2015, as a post-masters associate. During this appointment, he conducted research and development on active storage systems and scientific data management for HPC systems. His areas of interest include storage systems and distributed systems.

He received a M.S. in computer science from Virginia Tech in 2014 and is currently pursuing his PhD degree at Virginia Tech. He also earned a M.S. in Computer Engineering and a B.S. in Civil Engineering from Hanyang University in South Korea.